If you abstract that ask just a bit there is already an answer, although it's more of an industrial answer. the COM-Express Spec is something of this Universal socket [0]
And while all of that link above looks like a creamy beige box cringefest, the COM-HPC[1] interface is being used for some heavy-hitting systems including Xeon and Ampere Altra [2]
So, yea, you can get this in something more interoperable.
> If you abstract that ask just a bit there is already an answer, although it's more of an industrial answer. the COM-Express Spec is something of this Universal socket [0]
So are PCIe slots, except GPUs seem to have won on that front (RIP Xeon Phi).
Moving forward: PCIe 5.0 is having more-and-more atomic instructions execute over the PCIe 5.0 specification. Its looking like PCIe 5.0 will have cache-cohesive, in particular, the Compute Express Link (CXL).
So PCIe is looking more-and-more like a "standardized socket", rather than an I/O mechanism.
And while all of that link above looks like a creamy beige box cringefest, the COM-HPC[1] interface is being used for some heavy-hitting systems including Xeon and Ampere Altra [2]
So, yea, you can get this in something more interoperable.
0 - https://www.picmg.org/openstandards/com-express/
1 - https://www.picmg.org/openstandards/com-hpc/
2 - https://www.ipi.wiki/pages/com-hpc-altra