The on chip ECC for DDR5 isn't because of faster memory; it's because of denser ...

		monocasa on Jan 11, 2022 \| parent \| context \| favorite \| on: PCI-Sig Releases 256GBps PCIe 6.0 X16 Spec The on chip ECC for DDR5 isn't because of faster memory; it's because of denser memory. It can rowhammer itself, and fox it up silently. And the cheaper brands can start shipping chips with defects like they do with flash, relying on the ECC to paper over it.