It's a spectrum. I don't think that cache coherency was useable by developers/compilers. The two only ways I know (HMM and HSA) are niche, used by nobody. GPGPU compute would GREATLY benefit from programs that can share memory between cpu and gou without having to do needless high latency round-trips and copies. So they failed in practice. They never did a CPU addressable HBM interposer (despite having invented HBM) unlike what I believe is the M1.