Interesting! Makes me think of old 1990s X-Files episodes with chips under a microscope “smaller than we can produce”.
I wonder if the government makes small batches of bespoke chips that are super miniature based on non scalable processes, and how far back in time would they have been able to develop 1nm chips for example?
The node sizes have become more of marketing term, so it's more useful to look at the half-pitch resolution when doing comparisons. In 2007 researchers demonstrated they could reach a 15nm half-pitch using an electron scanning beam. [1] Whereas ASML reliably achieved this resolution using EUV around 2017.
Thus in the early 2000s you would be about 10 years ahead using electron scanning beam lithography. However that assumes you have all the tooling and transistor designs to actually create a working chip at that resolution. Showing you can etch a feature at nanometer scale is one thing, actually using it to create a working chip is a whole other ball game.
I wonder if the government makes small batches of bespoke chips that are super miniature based on non scalable processes, and how far back in time would they have been able to develop 1nm chips for example?